Own device evaluation and control software end-to-end, from C firmware on the board to the C# desktop application and Python services that drive it.

• Largest contributor in the software group: 4,622 commits across 47 projects — 33.7% of the group's total and roughly 2× the next most active contributor — with 729 pull requests authored at a 96% merge rate and 123 reviewed for teammates.
• Principal author on 29 repositories and sole author on 15, covering evaluation and control software for 15+ semiconductor products — power-management ICs, motor drivers, audio processors, voltage monitors and temperature sensors.
• Delivered a full-stack document OCR and search platform single-handedly and AI-assisted — specified it, directed GitHub Copilot agent mode and verified every build by hand: FastAPI, PaddleOCR, PostgreSQL full-text search, a React 19 client, Microsoft 365 login and nginx/TLS deployment.
• Adopted AI-assisted development as standard practice since 2025, delivering two production tools that way: Copilot agent mode under self-authored instruction files, diff-by-diff review before commit, hands-on testing, with unit tests and CI as the gate.
• Delivered embedded firmware alongside PC software: STM32 test-system controllers with TFT touchscreen state machines and WiFi fault alerting, NXP LPC command processors, Arduino verification harnesses and USB bridge firmware.
• Architected the shared platform layer underpinning the group's test tooling: Entity Framework data models, bidirectional SharePoint synchronisation, generic controllers replacing per-entity ones, packaged as a NuGet library.
• Established release engineering across the group — WiX Toolset installers, Azure Pipelines YAML builds with coverage gates, semantic versioning and release notes.

Designed and characterized standard cell libraries, and wrote the scripts that generated them, for the IC design teams.

• Designed and characterized standard cells — logic gate and latch families — in Cadence Virtuoso, sizing CMOS transistors to meet timing, power and area targets.
• Delivered the standard cell libraries consumed by the IC design teams: Liberty (.lib) timing libraries generated with Cadence Liberate, validated against HSPICE and Spectre, with matching Verilog models.
• Automated characterization and library generation with Perl and shell scripts on Linux and Windows, replacing manual file preparation with repeatable batch runs.